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 SSM72T02GH
N-CHANNEL ENHANCEMENT MODE POWER MOSFET
PRODUCT SUMMARY
Simple Drive Requirement Low On-Resistance Fast Switching Characteristic
D
BVDSS RDS(ON) ID
25V 9m 62A
G S
DESCRIPTION
The advanced power MOSFETs from Silicon Standard Corp. provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-252 package is universally preferred for all commercialindustrial surface mount applications and suited for low voltage applications such as DC/DC converters. The through-hole version (SSM72T02GH) are available for low-profile applications.
GD S
TO-252(H)
G
D
S
TO-251(J)
Pb-free; RoHS-compliant
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VGS ID@TC=25 ID@TC=100 IDM PD@TC=25 EAS IAR TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current
1
Rating 25 20 62 44 190 60 0.4
3
Units V V A A A W W/ mJ A
Total Power Dissipation Linear Derating Factor Single Pulse Avalanche Energy Avalanche Current Storage Temperature Range Operating Junction Temperature Range
29 24 -55 to 175 -55 to 175
THERMAL DATA
Symbol Rthj-c Rthj-a . Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max. Max. Value 2.5 110 Units /W /W
02/21/2008 Rev.1.00
www.SiliconStandard.com
1
SSM72T02GH
ELECTRICAL CHARACTERISTICS
(TJ=25 C unless otherwise specified)
Symbol BVDSS
BVDSS/Tj
o
Parameter Drain-Source Breakdown Voltage Static Drain-Source On-Resistance Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (T j=25oC) Drain-Source Leakage Current (T j=175oC)
2
Test Conditions VGS=0V, ID=250uA VGS=10V, ID=30A VGS=4.5V, ID=15A VDS=VGS, ID=250uA VDS=10V, ID=30A VDS=25V, VGS=0V VDS=20V ,VGS=0V VGS= 20V ID=30A VDS=20V VGS=4.5V VDS=15V ID=30A RG=3.3,VGS=10V RD=0.5 VGS=0V VDS=25V f=1.0MHz f=1.0MHz
Min. 25 1 -
Typ. 0.02 8 11 42 13 2.7 9 8 80 22 6 930 250 180 1.1
Max. Units 9 15 3 1 25 100 21 1490 1.7 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA
RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Rg
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance
2
SOURCE-DRAIN DIODE
Symbol VSD trr Qrr Parameter Forward On Voltage
2 2
Test Conditions IS=30A, VGS=0V IS=15A, VGS=0V, dI/dt=100A/s
Min. -
Typ. 26 15
Max. Units 1.3 V ns nC
Reverse Recovery Time
Reverse Recovery Charge
Notes:
1.Pulse width limited by max. junction temperature. 2.Pulse test 3.Starting Tj=25oC , VDD=25V , L=0.1mH , RG=25 , IAS=24A.
02/21/2008 Rev.1.00
www.SiliconStandard.com
2
SSM72T02GH
180 120
T C =25 C ID , Drain Current (A)
o
10V 7.0V ID , Drain Current (A)
T C =175 C
o
10V 7.0V 5.0V
120
80
5.0V 4.5V
4.5V
60
40
V G =3.0V
V G =3.0V
0 0 2 4 6 8
0 0 2 4 6 8
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
35
1.8
I D =15A T C =25
25
I D =30A V G =10V Normalized RDS(ON)
1.4
RDS(ON) (m)
15
1
5
0.6 2 4 6 8 10 -50 0 50 100 150 200
VGS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance v.s. Junction Temperature
1.8
30
Normalized VGS(th) (V)
1.4
20
1.2
IS(A)
T j =175 o C
T j =25 o C
10
0.6
0
0 0.2 0.4 0.6 0.8 1 1.2
0.0 -50 0 50 100 150 200
V SD , Source-to-Drain Voltage (V)
T j , Junction Temperature ( o C )
Fig 5. Forward Characteristic of
Reverse Diode
02/21/2008 Rev.1.00
Fig 6. Gate Threshold Voltage v.s. Junction Temperature
3
www.SiliconStandard.com
SSM72T02GH
f=1.0MHz
12 10000
I D = 30 A VGS , Gate to Source Voltage (V)
9
6
C (pF)
V DS = 10 V V DS = 15 V V DS = 20 V
1000
C iss
3
C oss C rss
0 0 10 20 30 100
1
5
9
13
17
21
25
29
Q G , Total Gate Charge (nC)
V DS , Drain-to-Source Voltage (V)
Fig7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1000
1
Normalized Thermal Response (R thjc)
Duty factor=0.5
0.2
100
ID (A)
100us
0.1
0.1
0.05
PDM
0.02
10
t T
Duty factor = t/T Peak Tj = PDM x Rthjc + T C
T c =25 o C Single Pulse
1 0.1 1 10
1ms 10ms 100ms 1s DC
100
0.01
Single Pulse
0.01 0.00001 0.0001 0.001 0.01 0.1 1 10
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig10. Effective Transient Thermal Impedance
120
40
V DS =5V T j =25 o C T j =175 o C RDS(ON) (m )
30
2.8V 3V
3.2V
3.5V
3.8V
4.2V
ID , Drain Current (A)
80
20
4.5V 10V
40
10
0 0 2 4 6 8
0
0 20 40 60 80 100
V GS , Gate-to-Source Voltage (V)
I D (A)
Fig 11. Transfer Characteristics
Fig 12. Drain-Source On Resistance
02/21/2008 Rev.1.00
www.SiliconStandard.com
4
SSM72T02GH
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
02/21/2008 Rev.1.00
www.SiliconStandard.com
5


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